Sciweavers

41 search results - page 6 / 9
» M-trie: an efficient approach to on-chip logic minimization
Sort
View
CPAIOR
2006
Springer
13 years 11 months ago
Allocation, Scheduling and Voltage Scaling on Energy Aware MPSoCs
Abstract. In this paper we introduce a complex allocation and scheduling problem for variable voltage Multi-Processor System-on-Chip (MPSoC) platforms. We propose a methodology to ...
Luca Benini, Davide Bertozzi, Alessio Guerri, Mich...
ASPDAC
1995
ACM
108views Hardware» more  ASPDAC 1995»
13 years 11 months ago
Transistor reordering rules for power reduction in CMOS gates
— The goal of transistor reordering for a logic gate is to reduce the propagation delay as well as the charging and discharging of internal capacitances to achieve low power cons...
Wen-Zen Shen, Jiing-Yuan Lin, Fong-Wen Wang
ER
2008
Springer
134views Database» more  ER 2008»
13 years 9 months ago
On Measuring Process Model Similarity Based on High-Level Change Operations
For various applications there is the need to compare the similarity between two process models. For example, given the as-is and to-be models of a particular business process, we ...
Chen Li, Manfred Reichert, Andreas Wombacher
FPGA
2007
ACM
119views FPGA» more  FPGA 2007»
14 years 1 months ago
Synthesis of an application-specific soft multiprocessor system
The application-specific multiprocessor System-on-a-Chip is a promising design alternative because of its high degree of flexibility, short development time, and potentially high ...
Jason Cong, Guoling Han, Wei Jiang
CP
2006
Springer
13 years 11 months ago
Stochastic Allocation and Scheduling for Conditional Task Graphs in MPSoCs
This paper describes a complete and efficient solution to the stochastic allocation and scheduling for Multi-Processor System-on-Chip (MPSoC). Given a conditional task graph charac...
Michele Lombardi, Michela Milano