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ECAI
2006
Springer
13 years 11 months ago
A Multivalued Logic Model of Planning
Abstract. In this work a model for planning with multivalued fluents and graded actions, based on the infinite valued Lukasiewicz logic, is introduced. In multivalued planning, flu...
Marco Baioletti, Alfredo Milani, Valentina Poggion...
CASES
2001
ACM
13 years 11 months ago
Heads and tails: a variable-length instruction format supporting parallel fetch and decode
Abstract. Existing variable-length instruction formats provide higher code densities than fixed-length formats, but are ill-suited to pipelined or parallel instruction fetch and de...
Heidi Pan, Krste Asanovic
CASES
2000
ACM
13 years 11 months ago
Flexible instruction processors
This paper introduces the notion of a Flexible Instruction Processor (FIP) for systematic customisation of instruction processor design and implementation. The features of our app...
Shay Ping Seng, Wayne Luk, Peter Y. K. Cheung
ICCD
1995
IEEE
83views Hardware» more  ICCD 1995»
13 years 11 months ago
Concurrent timing optimization of latch-based digital systems
Many design techniques have been proposed to optimize the performance of a digital system implemented in a given technology. Each of these techniques can be advantageous in partic...
Hong-Yean Hsieh, Wentai Liu, Ralph K. Cavin III, C...
SC
1995
ACM
13 years 11 months ago
Multicast Virtual Topologies for Collective Communication in MPCs and ATM Clusters
This paper de nes and describes the properties of a multicast virtual topology, the M-array, and a resource-ecient variation, the REM-array. It is shown how several collective op...
Yih Huang, Chengchang Huang, Philip K. McKinley