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ANCS
2010
ACM
13 years 8 months ago
sNICh: efficient last hop networking in the data center
: sNICh: Efficient Last Hop Networking in the Data Center Kaushik Kumar Ram, Jayaram Mudigonda, Alan L. Cox, Scott Rixner, Partha Ranganathan, Jose Renato Santos HP Laboratories H...
Kaushik Kumar Ram, Jayaram Mudigonda, Alan L. Cox,...
SIGOPS
2011
215views Hardware» more  SIGOPS 2011»
13 years 4 months ago
Log-based architectures: using multicore to help software behave correctly
While application performance and power-efficiency are both important, application correctness is even more important. In other words, if the application is misbehaving, it is li...
Shimin Chen, Phillip B. Gibbons, Michael Kozuch, T...
ISCA
2011
IEEE
287views Hardware» more  ISCA 2011»
13 years 1 months ago
Scalable power control for many-core architectures running multi-threaded applications
Optimizing the performance of a multi-core microprocessor within a power budget has recently received a lot of attention. However, most existing solutions are centralized and cann...
Kai Ma, Xue Li, Ming Chen, Xiaorui Wang
ISCA
2011
IEEE
365views Hardware» more  ISCA 2011»
13 years 1 months ago
Kilo-NOC: a heterogeneous network-on-chip architecture for scalability and service guarantees
Today’s chip-level multiprocessors (CMPs) feature up to a hundred discrete cores, and with increasing levels of integration, CMPs with hundreds of cores, cache tiles, and specia...
Boris Grot, Joel Hestness, Stephen W. Keckler, Onu...
ASPLOS
2011
ACM
13 years 1 months ago
Sponge: portable stream programming on graphics engines
Graphics processing units (GPUs) provide a low cost platform for accelerating high performance computations. The introduction of new programming languages, such as CUDA and OpenCL...
Amir Hormati, Mehrzad Samadi, Mark Woh, Trevor N. ...