We present a Sensor-Network Asynchronous Processor (SNAP), which we have designed to be both a processor core for a sensor-network node and a component of a chip multiprocessor, t...
Clinton Kelly IV, Virantha N. Ekanayake, Rajit Man...
We present a framework that considers global routing, repeater insertion, and flip-flop relocation for early interconnect planning. We formulate the interconnect retiming and ...
We develop distributed algorithms for self-organizing sensor networks that respond to directing a target through a region. The sensor network models the danger levels sensed acros...
This paper is concerned with “open kernel” geometric modelling systems. It uses industrial needs to identify requirements for the geometric objects of a proposed interface. Th...
Alan E. Middleditch, Chris Reade, Abel J. P. Gomes
The work described here introduces a practical and accurate tool for predicting power consumption for FPGA circuits. The utility of the tool is that it enables FPGA circuit designe...
Timothy Osmulski, Jeffrey T. Muehring, Brian F. Ve...