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ICS
2003
Tsinghua U.
14 years 2 months ago
AEGIS: architecture for tamper-evident and tamper-resistant processing
We describe the architecture for a single-chip aegis processor which can be used to build computing systems secure against both physical and software attacks. Our architecture ass...
G. Edward Suh, Dwaine E. Clarke, Blaise Gassend, M...
MICRO
2002
IEEE
104views Hardware» more  MICRO 2002»
14 years 1 months ago
Reducing register ports for higher speed and lower energy
The key issues for register file design in high-performance processors are access time and energy. While previous work has focused on reducing the number of registers, we propose...
Il Park, Michael D. Powell, T. N. Vijaykumar
EDBT
2009
ACM
156views Database» more  EDBT 2009»
14 years 1 months ago
Secondary bitmap indexes with vertical and horizontal partitioning
Traditional bitmap indexes are utilized as a special type of primary or clustered indexes where the queries are answered by performing fast logical operations supported by hardwar...
Guadalupe Canahuate, Tan Apaydin, Ahmet Sacan, Hak...
GECCO
2009
Springer
204views Optimization» more  GECCO 2009»
14 years 1 months ago
Combined structure and motion extraction from visual data using evolutionary active learning
We present a novel stereo vision modeling framework that generates approximate, yet physically-plausible representations of objects rather than creating accurate models that are c...
Krishnanand N. Kaipa, Josh C. Bongard, Andrew N. M...
AGENTS
2001
Springer
14 years 1 months ago
The intelligent classroom: providing competent assistance
In the software industry, designers are forever trying to “improve” their products by adding ever more features to them, producing bloated software systems that are capable of...
David Franklin, Kristian J. Hammond