Abstract. As process technology scales down, power wall starts to hinder improvements in processor performance. Performance optimization has to proceed under a power constraint. Th...
— On current superscalar processors, performance and power issues cannot be decoupled for designers. Extensive simulations are usually required to meet both power and performance...
In this paper, the authors propose and analyze a network-based control architecture for power-electronicsbuilding-block-based converters. The objective of the proposed approach is ...
Rong Liu, Antonello Monti, Ferdinanda Ponci, Anton...
SeismoSpin is a novel interactive instrument designed around a “Disc-Jockey/mixer” metaphor that gives seismologists a quick and powerful way to explore earthquake data. The c...
Mark McKelvin, Ragnhild Nestande, Leticia Valdez, ...
- The electrical effects of CMOS IC physical defects that caused stuck-openfaults are evaluated, including their voltage levels, quiescent power supply current (IDDQ), transient re...
Jerry M. Soden, R. Keith Treece, Michael R. Taylor...