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RSP
2007
IEEE
143views Control Systems» more  RSP 2007»
14 years 1 months ago
Heuristics for Dynamic Task Mapping in NoC-based Heterogeneous MPSoCs
Multiprocessor Systems-on-Chip (MPSoCs) is a trend in VLSI design, since they minimize the “design crisis” (gap between silicon technology and actual SoC design capacity) and ...
Ewerson Carvalho, Ney Calazans, Fernando Moraes
ASPLOS
2008
ACM
13 years 9 months ago
The mapping collector: virtual memory support for generational, parallel, and concurrent compaction
Parallel and concurrent garbage collectors are increasingly employed by managed runtime environments (MREs) to maintain scalability, as multi-core architectures and multi-threaded...
Michal Wegiel, Chandra Krintz
DAC
2007
ACM
14 years 8 months ago
Efficient Computation of Buffer Capacities for Cyclo-Static Dataflow Graphs
A key step in the design of cyclo-static real-time systems is the determination of buffer capacities. In our multi-processor system, we apply back-pressure, which means that tasks...
Maarten Wiggers, Marco Bekooij, Gerard J. M. Smit
CASES
2008
ACM
13 years 9 months ago
Multi-granularity sampling for simulating concurrent heterogeneous applications
Detailed or cycle-accurate/bit-accurate (CABA) simulation is a critical phase in the design flow of embedded systems. However, with increasing system complexity, full detailed sim...
Melhem Tawk, Khaled Z. Ibrahim, Smaïl Niar
ICCD
2007
IEEE
105views Hardware» more  ICCD 2007»
13 years 11 months ago
Power-aware mapping for reconfigurable NoC architectures
A core mapping method for reconfigurable network-on-chip (NoC) architectures is presented in this paper. In most of the existing methods, mapping is carried out based on the traff...
Mehdi Modarressi, Hamid Sarbazi-Azad