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FCCM
2007
IEEE
129views VLSI» more  FCCM 2007»
14 years 1 months ago
Automatic On-chip Memory Minimization for Data Reuse
FPGA-based computing engines have become a promising option for the implementation of computationally intensive applications due to high flexibility and parallelism. However, one...
Qiang Liu, George A. Constantinides, Konstantinos ...
ISNN
2005
Springer
14 years 27 days ago
A SIMD Neural Network Processor for Image Processing
Abstract. Artificial Neural Networks (ANNs) and image processing requires massively parallel computation of simple operator accompanied by heavy memory access. Thus, this type of ...
Dongsun Kim, Hyunsik Kim, Hongsik Kim, Gunhee Han,...
IPSN
2004
Springer
14 years 23 days ago
Distributed state representation for tracking problems in sensor networks
This paper investigates the problem of designing decentralized representations to support monitoring and inferences in sensor networks. State-space models of physical phenomena su...
Juan Liu, Maurice Chu, Jie Liu, Jim Reich, Feng Zh...
IPPS
2002
IEEE
14 years 9 days ago
System-Level Analysis for MPEG-4 Decoding on a Multi-Processor Architecture
The convergence of TV and new features such as Internet and games, requires a generic media-processing platform, that enables simultaneous execution of very diverse tasks, ranging...
Egbert G. T. Jaspers, Erik B. van der Tol, Peter H...
ISCAS
1994
IEEE
117views Hardware» more  ISCAS 1994»
13 years 11 months ago
Design of a Fast Sequential Decoding Algorithm Based on Dynamic Searching Strategy
This paper presents a new sequential decoding algorithm based on dynamic searching strategy to improve decoding efficiency. The searching strategy is to exploit both sorting and p...
Wen-Wei Yang, Li-Fu Jeng, Chen-Yi Lee