Sciweavers

10805 search results - page 23 / 2161
» Mapping Computation with No Memory
Sort
View
CCECE
2011
IEEE
12 years 8 months ago
A flash resident file system for embedded sensor networks
Many embedded devices, especially those designed for environmental sensor logging, have extremely limited RAM, often less than several kilobytes. Logged data is stored on flash m...
Scott Fazackerley, Ramon Lawrence
FCCM
2007
IEEE
129views VLSI» more  FCCM 2007»
14 years 3 months ago
Automatic On-chip Memory Minimization for Data Reuse
FPGA-based computing engines have become a promising option for the implementation of computationally intensive applications due to high flexibility and parallelism. However, one...
Qiang Liu, George A. Constantinides, Konstantinos ...
PRDC
2007
IEEE
14 years 3 months ago
PAI: A Lightweight Mechanism for Single-Node Memory Recovery in DSM Servers
Several recent studies identify the memory system as the most frequent source of hardware failures in commercial servers. Techniques to protect the memory system from failures mus...
Jangwoo Kim, Jared C. Smolens, Babak Falsafi, Jame...
HPCA
2001
IEEE
14 years 9 months ago
Reducing DRAM Latencies with an Integrated Memory Hierarchy Design
In this papel; we address the severe performance gap caused by high processor clock rates and slow DRAM accesses. We show that even with an aggressive, next-generation memory syst...
Wei-Fen Lin, Steven K. Reinhardt, Doug Burger
IPPS
2006
IEEE
14 years 2 months ago
A configuration memory hierarchy for fast reconfiguration with reduced energy consumption overhead
Currently run-time reconfigurable hardware offers really attractive features for embedded systems, such as flexibility, reusability, high performance and, in some cases, low-power...
Elena Perez Ramo, Javier Resano, Daniel Mozos, Fra...