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ICDAR
1997
IEEE
14 years 29 days ago
Memory efficient skeletonization of utility maps
An algorithm is presented that allows to perform skeletonization of large maps with much lower memory requirements than with the straightforward approach. The maps are divided int...
Albert M. Vossepoel, Klamer Schutte, Carl F. P. De...
LCTRTS
2010
Springer
14 years 3 months ago
Operation and data mapping for CGRAs with multi-bank memory
Coarse Grain Reconfigurable Architectures (CGRAs) promise high performance at high power efficiency. They fulfil this promise by keeping the hardware extremely simple, and movi...
Yongjoo Kim, Jongeun Lee, Aviral Shrivastava, Yunh...
ASPLOS
2008
ACM
13 years 10 months ago
The mapping collector: virtual memory support for generational, parallel, and concurrent compaction
Parallel and concurrent garbage collectors are increasingly employed by managed runtime environments (MREs) to maintain scalability, as multi-core architectures and multi-threaded...
Michal Wegiel, Chandra Krintz
ISCA
2009
IEEE
148views Hardware» more  ISCA 2009»
14 years 3 months ago
Memory mapped ECC: low-cost error protection for last level caches
This paper presents a novel technique, Memory Mapped ECC, which reduces the cost of providing error correction for SRAM caches. It is important to limit such overheads as processo...
Doe Hyun Yoon, Mattan Erez
SIBGRAPI
1999
IEEE
14 years 1 months ago
A Framework for Attention and Object Categorization Using a Stereo Head Robot
This work describes a framework for dealing with attention and categorization using a robot platform consisting of an articulated stereo-head with four degrees of freedom (pan, til...
Luiz M. G. Gonçalves, Antonio A. F. Oliveir...