85 search results - page 7 / 17 » Mapping Interconnection Networks into VEDIC Networks |
DATE
2005
IEEE
14 years 19 days ago
2005
IEEE
Complex applications implemented as Systems on Chip (SoCs) demand extensive use of system level modeling and validation. Their implementation gathers a large number of complex IP ...
IPSN
2005
Springer
14 years 15 days ago
2005
Springer
Abstract—In many sensor networks applications, sensors collect correlated measurements of a physical field, e.g., temperature field in a building or in a data center. However, ...
ANCS
2005
ACM
14 years 17 days ago
2005
ACM
This paper investigates the suitability of emerging tiled-architectures, equipped with low-latency on-chip networks, for high-performance network routing. In this paper, we presen...
CF
2007
ACM
13 years 11 months ago
2007
ACM
As we enter the era of petascale computing, system architects must plan for machines composed of tens or even hundreds of thousands of processors. Although fully connected network...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
An execution environment consisting of virtual machines (VMs) interconnected with a virtual overlay network can use the naturally occurring traffic of an existing, unmodified ap...