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» Massively parallel processing on a chip
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2006
IEEE
13 years 11 months ago
Lightweight I/O for Scientific Applications
Today's high-end massively parallel processing (MPP) machines have thousands to tens of thousands of processors, with next-generation systems planned to have in excess of one...
Ron Oldfield, Lee Ward, Rolf Riesen, Arthur B. Mac...
WWW
2008
ACM
14 years 8 months ago
Using graphics processors for high-performance IR query processing
Web search engines are facing formidable performance challenges due to data sizes and query loads. The major engines have to process tens of thousands of queries per second over t...
Shuai Ding, Jinru He, Hao Yan, Torsten Suel
IPPS
2007
IEEE
14 years 1 months ago
Route Table Partitioning and Load Balancing for Parallel Searching with TCAMs
With the continuous advances in optical communications technology, the link transmission speed of Internet backbone has been increasing rapidly. This in turn demands more powerful...
Dong Lin, Yue Zhang 0006, Chengchen Hu, Bin Liu, X...
ISCA
2010
IEEE
232views Hardware» more  ISCA 2010»
13 years 6 months ago
Evolution of thread-level parallelism in desktop applications
As the effective limits of frequency and instruction level parallelism have been reached, the strategy of microprocessor vendors has changed to increase the number of processing ...
Geoffrey Blake, Ronald G. Dreslinski, Trevor N. Mu...
NETWORKING
2007
13 years 9 months ago
Accelerated Packet Placement Architecture for Parallel Shared Memory Routers
Abstract. Parallel shared memory (PSM) routers represent an architectural approach for addressing the high memory bandwidth requirements dictated by output-queued switches. A funda...
Brad Matthews, Itamar Elhanany, Vahid Tabatabaee