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DSD
2009
IEEE
145views Hardware» more  DSD 2009»
14 years 2 months ago
High Performance Image Processing on a Massively Parallel Processor Array
Multicore and manycore processors are the new wave of computing, offering high performance by using large numbers of simple processors. In this paper, we describe the implementati...
Roberto R. Osorio, Cesar Diaz-Resco, Javier D. Bru...
LCN
2003
IEEE
14 years 23 days ago
A holistic methodology for network processor design
The GigaNetIC project aims to develop high-speed components for networking applications based on massively parallel architectures. A central part of this project is the design, ev...
Olaf Bonorden, Nikolaus Brüls, Uwe Kastens, D...
TC
2010
13 years 5 months ago
Network-on-Chip Hardware Accelerators for Biological Sequence Alignment
—The most pervasive compute operation carried out in almost all bioinformatics applications is pairwise sequence homology detection (or sequence alignment). Due to exponentially ...
Souradip Sarkar, Gaurav Ramesh Kulkarni, Partha Pr...
IJCAI
1989
13 years 8 months ago
Domain Dependence in Parallel Constraint Satisfaction
We describe a general technique for expressing domain knowledge in constraint satisfaction problems, and using it to develop optimized parallel arc consistency algorithms for the ...
Paul R. Cooper, Michael J. Swain
IMCSIT
2010
13 years 4 months ago
Parallel, Massive Processing in SuperMatrix - a General Tool for Distributional Semantic Analysis of Corpus
The paper presents an extended version of the SuperMatrix system -- a general tool supporting automatic acquisition of lexical semantic relations from corpora. Extensions focus mai...
Bartosz Broda, Damian Jaworski, Maciej Piasecki