391 search results - page 44 / 79 » Massively parallel processing on a chip |
ICCD
2008
IEEE
14 years 4 months ago
2008
IEEE
—This paper presents a high-performance parallel context-based adaptive length coding (CAVLC) encoder implemented on a fine-grained many-core system. The software encoder is desi...
EUROPAR
2010
Springer
13 years 8 months ago
2010
Springer
This work presents an application case study. Geant4 is a 750,000 line toolkit first designed in the mid-1990s and originally intended only for sequential computation. Intel's...
HIPC
2004
Springer
14 years 1 months ago
2004
Springer
Parasitic extraction techniques are used to estimate signal delay in VLSI chips. Inductance extraction is a critical component of the parasitic extraction process in which on-chip ...
ARC
2008
Springer
13 years 9 months ago
2008
Springer
Abstract. This paper presents a real time parallel hardware architecture for image feature detection based on the SIFT (Scale Invariant Feature Transform) algorithm. This architect...
ICDM
2006
IEEE
14 years 1 months ago
2006
IEEE
Mining graph data is an increasingly popular challenge, which has practical applications in many areas, including molecular substructure discovery, web link analysis, fraud detect...