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» Massively parallel processing on a chip
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ASPDAC
2005
ACM
142views Hardware» more  ASPDAC 2005»
13 years 9 months ago
An AMBA AHB-based reconfigurable SOC architecture using multiplicity of dedicated flyby DMA blocks
– We propose a System-on-Chip (SoC) architecture for reconfigurable applications based on the AMBA HighSpeed Bus (AHB). The architecture features multiple low-area flyby DMA bloc...
Adeoye Olugbon, Sami Khawam, Tughrul Arslan, Ioann...
NIPS
2003
13 years 9 months ago
A Recurrent Model of Orientation Maps with Simple and Complex Cells
We describe a neuromorphic chip that utilizes transistor heterogeneity, introduced by the fabrication process, to generate orientation maps similar to those imaged in vivo. Our mo...
Paul Merolla, Kwabena Boahen
VLDB
2007
ACM
166views Database» more  VLDB 2007»
14 years 1 months ago
To Share or Not To Share?
Intuitively, aggressive work sharing among concurrent queries in a database system should always improve performance by eliminating redundant computation or data accesses. We show...
Ryan Johnson, Nikos Hardavellas, Ippokratis Pandis...
HPDC
2010
IEEE
13 years 7 months ago
A GPU accelerated storage system
Massively multicore processors, like, for example, Graphics Processing Units (GPUs), provide, at a comparable price, a one order of magnitude higher peak performance than traditio...
Abdullah Gharaibeh, Samer Al-Kiswany, Sathish Gopa...
ISCAS
2007
IEEE
123views Hardware» more  ISCAS 2007»
14 years 1 months ago
An Organic Computing architecture for visual microprocessors based on Marching Pixels
—The paper presents architecture and synthesis results for an organic computing hardware for smart CMOS camera chips. The organic behavior in the chip hardware is based on distri...
Dietmar Fey, Marcus Komann, Frank Schurz, Andreas ...