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VLSID
2007
IEEE
231views VLSI» more  VLSID 2007»
14 years 8 months ago
AHIR: A Hardware Intermediate Representation for Hardware Generation from High-level Programs
We present AHIR, an intermediate representation (IR), that acts as a transition layer between software compilation and hardware synthesis. Such a transition layer is intended to t...
Sameer D. Sahasrabuddhe, Hakim Raja, Kavi Arya, Ma...
TGC
2005
Springer
14 years 1 months ago
Mixin Modules for Dynamic Rebinding
Dynamic rebinding is the ability of changing the definitions of names at execution time. While dynamic rebinding is clearly useful in practice, and increasingly needed in modern s...
Davide Ancona, Sonia Fagorzi, Elena Zucca
FCCM
2002
IEEE
174views VLSI» more  FCCM 2002»
14 years 15 days ago
PAM-Blox II: Design and Evaluation of C++ Module Generation for Computing with FPGAs
This paper explores the implications of integrating flexible module generation into a compiler for FPGAs. The objective is to improve the programmabilityof FPGAs, or in other wor...
Oskar Mencer
BMCBI
2010
118views more  BMCBI 2010»
13 years 7 months ago
svdPPCS: an effective singular value decomposition-based method for conserved and divergent co-expression gene module identifica
Background: Comparative analysis of gene expression profiling of multiple biological categories, such as different species of organisms or different kinds of tissue, promises to e...
Wensheng Zhang, Andrea Edwards, Wei Fan, Dongxiao ...
IJBRA
2010
134views more  IJBRA 2010»
13 years 6 months ago
Deterministic graph-theoretic algorithm for detecting modules in biological interaction networks
—Accumulating evidence suggests that biological systems exhibit modular organization. Accurate identification of modularity is vital for understanding this organization. A recen...
Roger L. Chang, Feng Luo, Stuart Johnson, Richard ...