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HIPEAC
2007
Springer
14 years 3 months ago
Performance/Energy Optimization of DSP Transforms on the XScale Processor
The XScale processor family provides user-controllable independent configuration of CPU, bus, and memory frequencies. This feature introduces another handle for the code optimizat...
Paolo D'Alberto, Markus Püschel, Franz Franch...
LCTRTS
2007
Springer
14 years 3 months ago
Combining source-to-source transformations and processor instruction set extensions for the automated design-space exploration o
Industry’s demand for flexible embedded solutions providing high performance and short time-to-market has led to the development of configurable and extensible processors. The...
Richard Vincent Bennett, Alastair Colin Murray, Bj...
LCTRTS
2007
Springer
14 years 3 months ago
SWL: a search-while-load demand paging scheme with NAND flash memory
As mobile phones become increasingly multifunctional, the number and size of applications installed in phones are rapidly increasing. Consequently, mobile phones require more hard...
Jihyun In, Ilhoon Shin, Hyojun Kim
LCTRTS
2007
Springer
14 years 3 months ago
Addressing instruction fetch bottlenecks by using an instruction register file
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
Stephen Roderick Hines, Gary S. Tyson, David B. Wh...
OOPSLA
2007
Springer
14 years 3 months ago
Statistically rigorous java performance evaluation
Java performance is far from being trivial to benchmark because it is affected by various factors such as the Java application, its input, the virtual machine, the garbage collect...
Andy Georges, Dries Buytaert, Lieven Eeckhout