133 search results - page 11 / 27 » Measuring the Performance of Multimedia Instruction Sets |
ARITH
2001
IEEE
13 years 11 months ago
2001
IEEE
The Instruction Set Architecture (ISA) of a programmable processor is the native languageof the machine. It defines the set of operations and resourcesthat are optimized for that ...
CN
2006
13 years 8 months ago
2006
In this paper, we address the server selection problem for streaming applications on the Internet. The architecture we consider is similar to the content distribution networks con...
NOSSDAV
2005
Springer
14 years 1 months ago
2005
Springer
Multimedia applications today constitute a significant fraction of the workload running on portable devices such as mobile phones, PDAs and MP3 players. However, the processors i...
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
This paper presents a novel cycle-approximate performance estimation technique for automatically generated transaction level models (TLMs) for heterogeneous multicore designs. The...
VLDB
2005
ACM
14 years 1 months ago
2005
ACM
Simultaneous multithreading (SMT) allows multiple threads to supply instructions to the instruction pipeline of a superscalar processor. Because threads share processor resources,...