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96
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FPL
2009
Springer
102views Hardware» more  FPL 2009»
15 years 7 months ago
Macs: A Minimal Adaptive routing circuit-switched architecture for scalable and parametric NoCs
Networks-on-Chips (NoCs) are an emerging communication topology paradigm in single chip VLSI design, enhancing parallelism and system scalability. Processing units (PUs) connect t...
Rohit Kumar, Ann Gordon-Ross
CCGRID
2001
IEEE
15 years 6 months ago
A DSM Cluster Architecture Supporting Aggressive Computation in Active Networks
Active networks allow computations to be performed innetwork at routers as messages pass through them. Active networks offer unique opportunities to optimize networkcentric applic...
Peter C. J. Graham
130
Voted
CLOUD
2010
ACM
15 years 7 months ago
Comet: batched stream processing for data intensive distributed computing
Batched stream processing is a new distributed data processing paradigm that models recurring batch computations on incrementally bulk-appended data streams. The model is inspired...
Bingsheng He, Mao Yang, Zhenyu Guo, Rishan Chen, B...
123
Voted
PVM
2007
Springer
15 years 8 months ago
Revealing the Performance of MPI RMA Implementations
The MPI remote-memory access (RMA) operations provide a different programming model from the regular MPI-1 point-to-point operations. This model is particularly appropriate for ca...
William D. Gropp, Rajeev Thakur
95
Voted
NIPS
2001
15 years 4 months ago
Stochastic Mixed-Signal VLSI Architecture for High-Dimensional Kernel Machines
A mixed-signal paradigm is presented for high-resolution parallel innerproduct computation in very high dimensions, suitable for efficient implementation of kernels in image proce...
Roman Genov, Gert Cauwenberghs