Sciweavers

1095 search results - page 141 / 219
» Measuring the Performance of Parallel Message-Based Process ...
Sort
View
DGO
2010
189views Education» more  DGO 2010»
13 years 9 months ago
Three-layered QoS for eGovernment web services
An applied research for the incremental evolution of a service oriented architecture for local eGovernment portals has been developed. Our reference eGovernment environment, curre...
Antonio Candiello, Andrea Albarelli, Agostino Cort...
ASAP
2005
IEEE
112views Hardware» more  ASAP 2005»
14 years 1 months ago
The Midlifekicker Microarchitecture Evaluation Metric
We introduce the midlifekicker metric for evaluating microarchitectures mostly during the design process. We assume a microarchitecture designed at a time T-1 and estimate if a ne...
Stamatis Vassiliadis, Leonel Sousa, Georgi Gaydadj...
HPCA
2007
IEEE
14 years 8 months ago
Implications of Device Timing Variability on Full Chip Timing
As process technologies continue to scale, the magnitude of within-die device parameter variations is expected to increase and may lead to significant timing variability. This pap...
Murali Annavaram, Ed Grochowski, Paul Reed
PPDP
2009
Springer
14 years 2 months ago
Future contracts
Many recent research projects focus on language support for behavioral software contracts, that is, assertions that govern the boundaries between software building blocks such as ...
Christos Dimoulas, Riccardo Pucella, Matthias Fell...
ICNP
2009
IEEE
14 years 2 months ago
Better by a HAIR: Hardware-Amenable Internet Routing
—Routing protocols are implemented in the form of software running on a general-purpose microprocessor. However, conventional software-based router architectures face significan...
Firat Kiyak, Brent Mochizuki, Eric Keller, Matthew...