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ICCD
2000
IEEE
159views Hardware» more  ICCD 2000»
14 years 5 days ago
Evaluating Signal Processing and Multimedia Applications on SIMD, VLIW and Superscalar Architectures
This paper aims to provide a quantitative understanding of the performance of DSP and multimedia applications on very long instruction word (VLIW), single instruction multiple dat...
Deependra Talla, Lizy Kurian John, Viktor S. Lapin...
MSS
2005
IEEE
175views Hardware» more  MSS 2005»
14 years 1 months ago
High Performance Storage System Scalability: Architecture, Implementation and Experience
The High Performance Storage System (HPSS) provides scalable hierarchical storage management (HSM), archive, and file system services. Its design, implementation and current domin...
Richard W. Watson
SASP
2009
IEEE
170views Hardware» more  SASP 2009»
14 years 2 months ago
Parade: A versatile parallel architecture for accelerating pulse train clustering
— In this paper, we present Parade, a novel and flexible parallel architecture for the deinterleaving of combined pulsetrains. This is a commonly performed task in various areas ...
Amin Ansari, Dan Zhang, Scott A. Mahlke
PATMOS
2000
Springer
13 years 11 months ago
Data-Reuse and Parallel Embedded Architectures for Low-Power, Real-Time Multimedia Applications
Exploitation of data re-use in combination with the use of custom memory hierarchy that exploits the temporal locality of data accesses may introduce significant power savings, esp...
Dimitrios Soudris, Nikolaos D. Zervas, Antonios Ar...
HCI
2011
12 years 11 months ago
A Methodical Approach for Developing Valid Human Performance Models of Flight Deck Operations
Validation is critically important when human performance models are used to predict the effect of future system designs on human performance. A model of flight deck operations was...
Brian F. Gore, Becky L. Hooey, Nancy Haan, Deborah...