1095 search results - page 42 / 219 » Measuring the Performance of Parallel Message-Based Process ... |
CORR
2010
Springer
13 years 7 months ago
2010
Springer
We present a new very fast tree-code which runs on massively parallel Graphical Processing Units (GPU) with NVIDIA CUDA architecture. The tree-construction and calculation of mult...
SIGGRAPH
1994
ACM
13 years 12 months ago
1994
ACM
This paper describes the design and implementation of IRIS Performer, a toolkit for visual simulation, virtual reality, and other real-time 3D graphics applications. The principal...
IPPS
2007
IEEE
14 years 2 months ago
2007
IEEE
Over the years reconfigurable computing devices such as FPGAs have evolved from gate-level glue logic to complex reprogrammable processing architectures. However, the tools used f...
ICSE
2008
IEEE-ACM
14 years 8 months ago
2008
IEEE-ACM
Efforts for software evolution supersede any other part of the software life cycle. Technological decisions have a major impact on the maintainability, but are not well reflected ...
ICPPW
2002
IEEE
14 years 22 days ago
2002
IEEE
This paper presents a methodology for aiding a scientific programmer to evaluate the performance of parallel programs on advanced architectures. It applies well-defined design o...