1095 search results - page 46 / 219 » Measuring the Performance of Parallel Message-Based Process ... |
HPCA
2000
IEEE
14 years 6 days ago
2000
IEEE
Processor architectures with tens to hundreds of arithmetic units are emerging to handle media processing applications. These applications, such as image coding, image synthesis, ...
ISCAS
2007
IEEE
14 years 2 months ago
2007
IEEE
—This paper presents a DAC architecture built on parallel current-steering sub-DAC entities. Two main novelties are explored: flexibility and smartness. Firstly, a number of avai...
SC
2004
ACM
14 years 1 months ago
2004
ACM
The Merrimac supercomputer uses stream processors and a highradix network to achieve high performance at low cost and low power. The stream architecture matches the capabilities o...
CLUSTER
2004
IEEE
13 years 7 months ago
2004
IEEE
In previous papers [5,6], an optical switch architecture was proposed to handle variable-length packets such as IP datagrams, based on an AWG device to route packets and equipped w...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
The growing reliance on services provided by software applications places a high premium on the reliable and efficient operation of these applications. A number of these applicat...