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» Mechanisms for Mapping High-Level Parallel Performance Data
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MICRO
2003
IEEE
132views Hardware» more  MICRO 2003»
14 years 3 months ago
Checkpoint Processing and Recovery: Towards Scalable Large Instruction Window Processors
Large instruction window processors achieve high performance by exposing large amounts of instruction level parallelism. However, accessing large hardware structures typically req...
Haitham Akkary, Ravi Rajwar, Srikanth T. Srinivasa...
ASPLOS
2000
ACM
14 years 2 months ago
Architectural Support for Fast Symmetric-Key Cryptography
The emergence of the Internet as a trusted medium for commerce and communication has made cryptography an essential component of modern information systems. Cryptography provides ...
Jerome Burke, John McDonald, Todd M. Austin
IPSN
2007
Springer
14 years 3 months ago
The regiment macroprogramming system
The development of high-level programming environments is essential if wireless sensor networks are to be accessible to nonexperts. In this paper, we present the Regiment system, ...
Ryan Newton, Greg Morrisett, Matt Welsh
MM
2010
ACM
271views Multimedia» more  MM 2010»
13 years 7 months ago
Large-scale music tag recommendation with explicit multiple attributes
Social tagging can provide rich semantic information for largescale retrieval in music discovery. Such collaborative intelligence, however, also generates a high degree of tags un...
Zhendong Zhao, Xinxi Wang, Qiaoliang Xiang, Andy M...
SASO
2007
IEEE
14 years 4 months ago
e-SAFE: An Extensible, Secure and Fault Tolerant Storage System
With the rapidly falling price of hardware, and increasingly available bandwidth, the storage technology is seeing a paradigm shift from centralized and managed mode to distribute...
Sandip Agarwala, Arnab Paul, Umakishore Ramachandr...