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» Mechanisms for store-wait-free multiprocessors
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PPOPP
1995
ACM
13 years 10 months ago
Optimistic Active Messages: A Mechanism for Scheduling Communication with Computation
Low-overhead message passing is critical to the performance of many applications. Active Messages[27] reduce the software overhead for message handling: messages are run as handle...
Deborah A. Wallach, Wilson C. Hsieh, Kirk L. Johns...
ISCA
2005
IEEE
147views Hardware» more  ISCA 2005»
14 years 21 days ago
Interconnections in Multi-Core Architectures: Understanding Mechanisms, Overheads and Scaling
This paper examines the area, power, performance, and design issues for the on-chip interconnects on a chip multiprocessor, attempting to present a comprehensive view of a class o...
Rakesh Kumar, Victor V. Zyuban, Dean M. Tullsen
ACSD
2007
IEEE
136views Hardware» more  ACSD 2007»
14 years 1 months ago
Mapping Applications to Tiled Multiprocessor Embedded Systems
Modern multiprocessor embedded systems execute a large number of tasks on shared processors and handle their complex communications on shared communication networks. Traditional m...
Lothar Thiele, Iuliana Bacivarov, Wolfgang Haid, K...
ASPLOS
1992
ACM
13 years 11 months ago
Closing the Window of Vulnerability in Multiphase Memory Transactions
Multiprocessor architects have begun to explore several mechanisms such as prefetching, context-switching and software-assisted dynamic cache-coherence, which transform single-pha...
John Kubiatowicz, David Chaiken, Anant Agarwal
IPPS
1998
IEEE
13 years 11 months ago
An Efficient RMS Admission Control and Its Application to Multiprocessor Scheduling
A real-time system must execute functionally correct computations in a timely manner. In order to guarantee that all tasks accepted in the system will meet their timing requiremen...
Sylvain Lauzac, Rami G. Melhem, Daniel Mossé...