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TACAS
2010
Springer
210views Algorithms» more  TACAS 2010»
14 years 2 months ago
Automatic Analysis of Scratch-Pad Memory Code for Heterogeneous Multicore Processors
Modern multicore processors, such as the Cell Broadband Engine, achieve high performance by equipping accelerator cores with small “scratchpad” memories. The price for increase...
Alastair F. Donaldson, Daniel Kroening, Philipp R&...
CAV
2008
Springer
157views Hardware» more  CAV 2008»
13 years 9 months ago
Effective Program Verification for Relaxed Memory Models
Program verification for relaxed memory models is hard. The high degree of nondeterminism in such models challenges standard verification techniques. This paper proposes a new veri...
Sebastian Burckhardt, Madanlal Musuvathi
CORR
2011
Springer
170views Education» more  CORR 2011»
13 years 2 months ago
A Model for Coherent Distributed Memory For Race Condition Detection
—We present a new model for distributed shared memory systems, based on remote data accesses. Such features are offered by network interface cards that allow one-sided operations...
Franck Butelle, Camille Coti
HPCA
2009
IEEE
14 years 8 months ago
Dacota: Post-silicon validation of the memory subsystem in multi-core designs
The number of functional errors escaping design verification and being released into final silicon is growing, due to the increasing complexity and shrinking production schedules ...
Andrew DeOrio, Ilya Wagner, Valeria Bertacco
ASPLOS
2011
ACM
12 years 11 months ago
NV-Heaps: making persistent objects fast and safe with next-generation, non-volatile memories
nt, user-defined objects present an attractive abstraction for working with non-volatile program state. However, the slow speed of persistent storage (i.e., disk) has restricted ...
Joel Coburn, Adrian M. Caulfield, Ameen Akel, Laur...