745 search results - page 112 / 149 » Memory Exploration for Low Power, Embedded Systems |
CLUSTER
2008
IEEE
14 years 4 months ago
2008
IEEE
—The industry is now in agreement that the future of architecture design lies in multiple cores. As a consequence, all computer systems today, from embedded devices to petascale ...
ISSRE
2010
IEEE
13 years 8 months ago
2010
IEEE
Abstract—As smart phones grow in popularity, manufacturers are in a race to pack an increasingly rich set of features into these tiny devices. This brings additional complexity i...
SAC
2009
ACM
14 years 3 months ago
2009
ACM
Wireless sensor networks (WSNs) are subject to significant resource constraints. Particularly, routing protocols for lowrate WSNs suffer from maintaining routing metrics and sta...
ERSA
2004
13 years 11 months ago
2004
Modern reconfigurable computing systems feature powerful hybrid architectures with multiple microprocessor cores, large reconfigurable logic arrays and distributed memory hierarch...
SAMOS
2005
Springer
14 years 3 months ago
2005
Springer
This paper presents a new tool for the automatic generation of highly parallelized Finite Impulse Response (FIR) filters. In this approach we follow our PARO design methodology. P...