102 search results - page 11 / 21 » Memory Interfacing and Instruction Specification for Reconfi... |
ERSA
2008
13 years 10 months ago
2008
- This paper presents a framework that improves the portability and ease-of-use issues of current Reconfigurable Computers (RCs). These two drawbacks should be solved in order for ...
TC
2010
13 years 3 months ago
2010
We propose an execution model that orchestrates the fine-grained interaction of a conventional general-purpose processor (GPP) and a high-speed reconfigurable hardware accelerator ...
EUROPAR
1999
Springer
14 years 25 days ago
1999
Springer
Processor cycle time continues to decrease faster than main memory access times, placing higher demands on cache memory hierarchy performance. To meet these demands, conventional ...
FCCM
2007
IEEE
14 years 2 months ago
2007
IEEE
A new platform for reconfigurable computing has an object-based programming model, with architecture, silicon and tools designed to faithfully realize this model. The platform is ...
CODES
2006
IEEE
13 years 10 months ago
2006
IEEE
The lack of memory safety in many popular programming languages, including C and C++, has been a cause for great concern in the realm of software reliability, verification, and mo...