102 search results - page 15 / 21 » Memory Interfacing and Instruction Specification for Reconfi... |
FPGA
2008
ACM
13 years 10 months ago
2008
ACM
We present HybridOS, a set of operating system extensions for supporting fine-grained reconfigurable accelerators integrated with general-purpose computing platforms. HybridOS spe...
AES
2005
Springer
13 years 8 months ago
2005
Springer
Media-processing applications, such as signal processing, 2D and 3D graphics rendering, and image compression, are the dominant workloads in many embedded systems today. The real-...
GECCO
2009
Springer
13 years 6 months ago
2009
Springer
Simultaneous Multithreading (SMT) is a technology aimed at improving the throughput of the processor core by applying Instruction Level Parallelism (ILP) and Thread Level Parallel...
RSP
2000
IEEE
14 years 28 days ago
2000
IEEE
Dataflow programming has proven to be popular for representing applications in rapid prototyping tools for digital signal processing (DSP); however, existing dataflow design tools...
DAC
2003
ACM
14 years 9 months ago
2003
ACM
A binary decoder is a common component of software development tools such as instruction set simulators, disassemblers and debuggers. The efficiency of the decoder can have a sign...