276 search results - page 12 / 56 » Memory Organization for Improved Data Cache Performance in E... |
ICS
1999
Tsinghua U.
13 years 11 months ago
1999
Tsinghua U.
As the gap between memory and processor speeds continues to widen, cache efficiency is an increasingly important component of processor performance. Compiler techniques have been...
ICS
2005
Tsinghua U.
14 years 27 days ago
2005
Tsinghua U.
With the increasing performance gap between the processor and the memory, the importance of caches is increasing for high performance processors. However, with reducing feature si...
CASES
2007
ACM
13 years 11 months ago
2007
ACM
Dynamic binary translation (DBT) has been used to achieve numerous goals (e.g., better performance) for general-purpose computers. Recently, DBT has also attracted attention for e...
CASES
2008
ACM
13 years 9 months ago
2008
ACM
Dynamic binary translators (DBT) have recently attracted much attention for embedded systems. The effective implementation of DBT in these systems is challenging due to tight cons...
SAC
2009
ACM
14 years 2 months ago
2009
ACM
File systems make use of part of DRAM as the buffer cache to enhance its performance in traditional systems. In this paper, we consider the use of Non-Volatile RAM (NVRAM) as a w...