42 search results - page 5 / 9 » Memory Requirement Optimization with Loop Fusion and Loop Sh... |
SC
2003
ACM
14 years 21 days ago
2003
ACM
The growing processor/memory performance gap causes the performance of many codes to be limited by memory accesses. If known to exist in an application, strided memory accesses fo...
CF
2005
ACM
13 years 9 months ago
2005
ACM
Modern microprocessor designs continue to obtain impressive performance gains through increasing clock rates and advances in the parallelism obtained via micro-architecture design...
PLDI
2009
ACM
14 years 2 months ago
2009
ACM
Multicore designs have emerged as the mainstream design paradigm for the microprocessor industry. Unfortunately, providing multiple cores does not directly translate into performa...
PLDI
2005
ACM
14 years 1 months ago
2005
ACM
Modulo scheduling is an effective code generation technique that exploits the parallelism in program loops by overlapping iterations. One drawback of this optimization is that reg...
IEEEPACT
1999
IEEE
13 years 11 months ago
1999
IEEE
Existing techniques can enhance the locality of arrays indexed by affine functions of induction variables. This paper presents a technique to localize non-affine array references,...