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ISCA
2006
IEEE
92views Hardware» more  ISCA 2006»
13 years 7 months ago
Quantum Memory Hierarchies: Efficient Designs to Match Available Parallelism in Quantum Computing
The assumption of maximum parallelism support for the successful realization of scalable quantum computers has led to homogeneous, "sea-of-qubits" architectures. The res...
Darshan D. Thaker, Tzvetan S. Metodi, Andrew W. Cr...
IPPS
2007
IEEE
14 years 1 months ago
A Heterogeneous Lightweight Multithreaded Architecture
Programs with irregular patterns of dynamic data structures and/or those with complicated control structures such as recursion are notoriously difficult to parallelize efficient...
Sheng Li, Amit Kashyap, Shannon K. Kuntz, Jay B. B...
SCIA
2005
Springer
14 years 1 months ago
A Memory Architecture and Contextual Reasoning Framework for Cognitive Vision
One of the key requirements for a cognitive vision system to support reasoning is the possession of an effective mechanism to exploit context both for scene interpretation and for...
Josef Kittler, William J. Christmas, Alexey Kostin...
CLUSTER
2003
IEEE
14 years 28 days ago
Towards Load Balancing Support for I/O-Intensive Parallel Jobs in a Cluster of Workstations
While previous CPU- or memory-centric load balancing schemes are capable of achieving the effective usage of global CPU and memory resources in a cluster system, the cluster exhib...
Xiao Qin, Hong Jiang, Yifeng Zhu, David R. Swanson
DCOSS
2006
Springer
13 years 11 months ago
Y-Threads: Supporting Concurrency in Wireless Sensor Networks
Abstract. Resource constrained systems often are programmed using an eventbased model. Many applications do not lend themselves well to an event-based approach, but preemptive mult...
Christopher Nitta, Raju Pandey, Yann Ramin