3202 search results - page 15 / 641 » Memory access scheduling |
CORR
2010
Springer
13 years 7 months ago
2010
Springer
In this paper, a method for efficient scheduling to obtain optimum job throughput in a distributed campus grid environment is presented; Traditional job schedulers determine job s...
GLOBECOM
2006
IEEE
14 years 1 months ago
2006
IEEE
— Emulating Output Queued (OQ) Switch with sustainable implementation cost and low fixed delay is always preferable in designing high performance routers. The SwitchMemory-Switch...
IOLTS
2002
IEEE
14 years 19 days ago
2002
IEEE
This paper proposes a new solution for the diagnosis of faults into embedded RAMs, currently under evaluation within STMicroelectronics. The proposed scheme uses dedicated circuit...
ISCA
2010
IEEE
14 years 24 days ago
2010
IEEE
SIMD organizations amortize the area and power of fetch, decode, and issue logic across multiple processing units in order to maximize throughput for a given area and power budget...
ISCA
2002
IEEE
14 years 19 days ago
2002
IEEE
An increasingly large portion of scheduler latency is derived from the monolithic content addressable memory (CAM) arrays accessed during instruction wakeup. The performance of th...