Sciweavers

3202 search results - page 25 / 641
» Memory access scheduling
Sort
View
104
Voted
ISPASS
2010
IEEE
15 years 7 months ago
StatStack: Efficient modeling of LRU caches
The identification of the memory gap in terms of the relatively slow memory accesses put a focus on cache
David Eklov, Erik Hagersten
170
Voted
IFIP
2010
Springer
14 years 9 months ago
Model Checking of Concurrent Algorithms: From Java to C
Concurrent software is difficult to verify. Because the thread schedule is not controlled by the application, testing may miss defects that occur under specific thread schedules. T...
Cyrille Artho, Masami Hagiya, Watcharin Leungwatta...
110
Voted
HPCA
2002
IEEE
16 years 3 months ago
A New Memory Monitoring Scheme for Memory-Aware Scheduling and Partitioning
We propose a low overhead, on-line memory monitoring scheme utilizing a set of novel hardware counters. The counters act like pressure gauges indicating the marginal gain in the n...
G. Edward Suh, Srinivas Devadas, Larry Rudolph
86
Voted
ISCA
1992
IEEE
88views Hardware» more  ISCA 1992»
15 years 6 months ago
Hiding Memory Latency using Dynamic Scheduling in Shared-Memory Multiprocessors
Kourosh Gharachorloo, Anoop Gupta, John L. Henness...
109
Voted
SIGMETRICS
1995
ACM
15 years 6 months ago
Scheduling Memory Constrained Jobs on Distributed Memory Parallel Computers
Cathy McCann, John Zahorjan