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ISCAS
2002
IEEE
124views Hardware» more  ISCAS 2002»
14 years 20 days ago
Performance optimization of multiple memory architectures for DSP
Multiple memory module architecture offers higher performance by providing potentially doubled memory bandwidth. Two key problems in gaining high performance in this kind of archi...
Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha
IEEEPACT
1998
IEEE
13 years 12 months ago
Adaptive Scheduling of Computations and Communications on Distributed Memory Systems
Compile-time scheduling is one approach to extract parallelism which has proved effective when the execution behavior is predictable. Unfortunately, the performance of most priori...
Mayez A. Al-Mouhamed, Homam Najjari
LCTRTS
2010
Springer
13 years 9 months ago
Resilience analysis: tightening the CRPD bound for set-associative caches
In preemptive real-time systems, scheduling analyses need—in addition to the worst-case execution time—the context-switch cost. In case of preemption, the preempted and the pr...
Sebastian Altmeyer, Claire Maiza, Jan Reineke
WCET
2007
13 years 9 months ago
Finding DU-Paths for Testing of Multi-Tasking Real-Time Systems using WCET Analysis
Memory corruption is one of the most common software failures. For sequential software and multitasking software with synchronized data accesses, it has been shown that program fa...
Daniel Sundmark, Anders Pettersson, Christer Sandb...
EUROPAR
2008
Springer
13 years 9 months ago
MPC: A Unified Parallel Runtime for Clusters of NUMA Machines
Over the last decade, Message Passing Interface (MPI) has become a very successful parallel programming environment for distributed memory architectures such as clusters. However, ...
Marc Pérache, Hervé Jourdren, Raymon...