3202 search results - page 429 / 641 » Memory access scheduling |
ICS
2009
Tsinghua U.
14 years 3 months ago
2009
Tsinghua U.
It has been observed that some applications manipulate large amounts of null data. Moreover these zero data often exhibit high spatial locality. On some applications more than 20%...
ICDCS
2007
IEEE
14 years 2 months ago
2007
IEEE
State-of-the-art networked storage servers are equipped with increasingly powerful computing capability and large DRAM memory as storage caches. However, their contribution to the...
IPPS
2007
IEEE
14 years 2 months ago
2007
IEEE
— Modern CPUs operate at GHz frequencies, but the latencies of memory accesses are still relatively large, in the order of hundreds of cycles. Deeper cache hierarchies with large...
IPPS
2006
IEEE
14 years 2 months ago
2006
IEEE
Modern network processors support high levels of parallelism in packet processing by supporting multiple threads that execute on a micro-engine. Threads switch context upon encoun...
OOPSLA
2004
Springer
14 years 1 months ago
2004
Springer
As improvements in processor speed continue to outpace improvements in cache and memory speed, poor locality increasingly degrades performance. Because copying garbage collectors ...