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ATS
2009
IEEE
127views Hardware» more  ATS 2009»
14 years 1 months ago
On the Generation of Functional Test Programs for the Cache Replacement Logic
Caches are crucial components in modern processors (both stand-alone or integrated into SoCs) and their test is a challenging task, especially when addressing complex and high-fre...
Wilson J. Perez, Danilo Ravotto, Edgar E. Sá...
SSDBM
2010
IEEE
248views Database» more  SSDBM 2010»
14 years 29 days ago
Client + Cloud: Evaluating Seamless Architectures for Visual Data Analytics in the Ocean Sciences
Science is becoming data-intensive, requiring new software architectures that can exploit resources at all scales: local GPUs for interactive visualization, server-side multi-core ...
Keith Grochow, Bill Howe, Mark Stoermer, Roger S. ...
DATE
2002
IEEE
153views Hardware» more  DATE 2002»
14 years 26 days ago
Low Power Embedded Software Optimization Using Symbolic Algebra
The market demand for portable multimedia applications has exploded in the recent years. Unfortunately, for such applications current compilers and software optimization methods o...
Armita Peymandoust, Tajana Simunic, Giovanni De Mi...
ICPADS
2002
IEEE
14 years 25 days ago
Hardware-based IP Routing Lookup with Incremental Update
Nowadays, the commonly used table lookup scheme for IP routing is based on the so-called classless interdomain routing (CIDR). With CIDR, routers must find out the best matching ...
Pi-Chung Wang, Chia-Tai Chan, Shuo-Cheng Hu, Yu-Ch...
IEEEPACT
2002
IEEE
14 years 25 days ago
Using the Compiler to Improve Cache Replacement Decisions
Memory performance is increasingly determining microprocessor performance and technology trends are exacerbating this problem. Most architectures use set-associative caches with L...
Zhenlin Wang, Kathryn S. McKinley, Arnold L. Rosen...