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96
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FPL
2009
Springer
130views Hardware» more  FPL 2009»
15 years 7 months ago
Tracking elephant flows in internet backbone traffic with an FPGA-based cache
This paper presents an FPGA-friendly approach to tracking elephant flows in network traffic. Our approach, Single Step Segmented Least Recently Used (S3 -LRU) policy, is a netwo...
Martin Zádník, Marco Canini, Andrew ...
203
Voted
EUROPAR
2001
Springer
15 years 7 months ago
Load Redundancy Elimination on Executable Code
Optimizations performed at link time or directly applied to nal program executables have received increased attention in recent years. This paper discuss the discovery and elimina...
Manel Fernández, Roger Espasa, Saumya K. De...
107
Voted
EUROPAR
2001
Springer
15 years 7 months ago
Performance of High-Accuracy PDE Solvers on a Self-Optimizing NUMA Architecture
High-accuracy PDE solvers use multi-dimensional fast Fourier transforms. The FFTs exhibits a static and structured memory access pattern which results in a large amount of communic...
Sverker Holmgren, Dan Wallin
MMMACNS
2001
Springer
15 years 7 months ago
Typed MSR: Syntax and Examples
Abstract. Many design flaws and incorrect analyses of cryptographic protoAppeared in the Proceedings of the First International Workshop on Mathematical Methods, Models and Archit...
Iliano Cervesato
SPIRE
2001
Springer
15 years 7 months ago
Speed-up of Aho-Corasick Pattern Matching Machines by Rearranging States
Thispaper describes speed-up of string pattern matchingby rearrangingstates inAho-Corasickpattern matching machine, which is a kind of afinite automaton. Werealized speed-up of st...
T. Nishimura, Shuichi Fukamachi, Takeshi Shinohara