Sciweavers

254 search results - page 31 / 51
» Memory copies in multi-level memory systems
Sort
View
MICRO
2006
IEEE
155views Hardware» more  MICRO 2006»
14 years 1 months ago
In-Network Cache Coherence
With the trend towards increasing number of processor cores in future chip architectures, scalable directory-based protocols for maintaining cache coherence will be needed. Howeve...
Noel Eisley, Li-Shiuan Peh, Li Shang
SIGMETRICS
2010
ACM
201views Hardware» more  SIGMETRICS 2010»
14 years 7 days ago
Transparent, lightweight application execution replay on commodity multiprocessor operating systems
We present S, the first system to provide transparent, lowoverhead application record-replay and the ability to go live from replayed execution. S i...
Oren Laadan, Nicolas Viennot, Jason Nieh
SAC
2005
ACM
14 years 29 days ago
Performance analysis framework for large software-intensive systems with a message passing paradigm
The launch of new features for mobile phones is increasing and the product life cycle symmetrically decreasing in duration as higher levels of sophistication are reached. Therefor...
Christian Del Rosso
CCS
2009
ACM
13 years 10 months ago
Filter-resistant code injection on ARM
Code injections attacks are one of the most powerful and important classes of attacks on software. In such attacks, the attacker sends malicious input to a software application, w...
Yves Younan, Pieter Philippaerts, Frank Piessens, ...
SENSYS
2009
ACM
14 years 2 months ago
Darjeeling, a feature-rich VM for the resource poor
The programming and retasking of sensor nodes could benefit greatly from the use of a virtual machine (VM) since byte code is compact, can be loaded on demand, and interpreted on...
Niels Brouwers, Koen Langendoen, Peter Corke