110 search results - page 21 / 22 » Memory hierarchy exploration for low power architectures in ... |
TOG
2012
11 years 10 months ago
2012
Using existing programming tools, writing high-performance image processing code requires sacrificing readability, portability, and modularity. We argue that this is a consequenc...
ARCS
2004
Springer
13 years 11 months ago
2004
Springer
: This paper reports ongoing work towards a dynamically reconfigurable System-on-Chip (SoC) platform for video signal processing. It consists of dedicated, statically and dynamical...
SC
2004
ACM
14 years 1 months ago
2004
ACM
This paper is structured as follows. Section 2 gives an architectural description of BlueGene/L. Section 3 analyzes the issue of “computational noise” – the effect that the o...
RTAS
2010
IEEE
13 years 5 months ago
2010
IEEE
Abstract--Modern computing systems have adopted multicore architectures and multiprocessor systems on chip (MPSoCs) for accommodating the increasing demand on computation power. Ho...
ICCD
2005
IEEE
14 years 4 months ago
2005
IEEE
Presently, Architecture Description Languages (ADLs) are widely used to raise the abstraction level of the design space exploration of Application Specific Instruction-set Proces...