56 search results - page 5 / 12 » Memory slicing |
ICSM
2007
IEEE
14 years 1 months ago
2007
IEEE
Recent software systems usually feature an automated failure reporting component, with which a huge number of failures are collected from software end-users. With a proper support...
SIGARCH
2008
13 years 7 months ago
2008
As CMP platforms are widely adopted, more and more cores are integrated on to the die. To reduce the off-chip memory access, the last level cache is usually organized as a distribu...
JSSPP
1997
Springer
13 years 11 months ago
1997
Springer
It is generally agreed that memory requirements should be taken into account in the scheduling of parallel jobs. However, so far the work on combined processor and memory schedulin...
VLSISP
2008
13 years 7 months ago
2008
This paper describes a novel memory hierarchy and line-pixel-lookahead (LPL) for an H.264/AVC video decoder. The memory system is the bottleneck of most video processors, particula...
FPL
2005
Springer
14 years 1 months ago
2005
Springer
A parallel MPEG-4 Simple Profile encoder for FPGA based multiprocessor System-on-Chip (SOC) is presented. The goal is a computationally scalable framework independent of platform....