69 search results - page 2 / 14 » Memory-aware Scheduling for Energy Efficiency on Multicore P... |
DAC
2000
ACM
14 years 8 months ago
2000
ACM
Memory delays represent a major bottleneck in embedded systems performance. Newer memory modules exhibiting efficient access modes (e.g., page-, burst-mode) partly alleviate this ...
EUROPAR
2008
Springer
13 years 9 months ago
2008
Springer
Cache affinity between a process and a processor is observed when the processor cache has accumulated some amount of the process state, i.e., data or instructions. Cache affinity i...
ICCAD
2001
IEEE
14 years 4 months ago
2001
IEEE
- Real-time scheduling on processors that support dynamic voltage and frequency scaling is analyzed. The Slacked Earliest Deadling First (SEDF) algorithm is proposed and it is show...
SPAA
2010
ACM
13 years 7 months ago
2010
ACM
We present a scheduling algorithm of stream programs for multi-core architectures called team scheduling. Compared to previous multi-core stream scheduling algorithms, team schedu...
IISWC
2008
IEEE
14 years 1 months ago
2008
IEEE
Heterogeneous multi-core processors are attractive for power efficient computing because of their ability to meet varied resource requirements of diverse applications in a workloa...