Basing rollback recovery on optimistic message logging and replay avoids the need for synchronization between processes during failure-free execution. Some previous research has a...
The appearance of 64-bit processors allows a new approach to microkernel desagn From our experience with a message passang microkernel MESHIX, we discovered that a multi-address s...
Kevin Murray, Tim Wilkinson, Tom Stiemerling, Paul...
The dramatic improvements in the processing rates of parallel computers are turning many compute-bound jobs into IO-bound jobs. Parallel le systems have been proposed to better ma...
This paper describes a single chip Multiple Instruction Stream Computer (MISC) capable of extracting instruction level parallelism from a broad spectrum of programs. The MISC arch...
Gary S. Tyson, Matthew K. Farrens, Andrew R. Plesz...
We examine computing alternative solutions to a problem in parallel to improve response time. Problems with exploring multiple alternatives in parallel include (1) side-effects an...