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RTCSA
2008
IEEE
14 years 3 months ago
Maximizing the Fault Tolerance Capability of Fixed Priority Schedules
Real-time systems typically have to satisfy complex requirements, mapped to the task attributes, eventually guaranteed by the underlying scheduler. These systems consist of a mix ...
Radu Dobrin, Hüseyin Aysan, Sasikumar Punnekk...
CODES
2007
IEEE
14 years 3 months ago
Complex task activation schemes in system level performance analysis
The design and analysis of today’s complex real-time systems requires advanced methods. Due to ever growing functionality, hardware complexity and component interaction, applyin...
Wolfgang Haid, Lothar Thiele
FPGA
2009
ACM
343views FPGA» more  FPGA 2009»
14 years 3 months ago
Fpga-based face detection system using Haar classifiers
This paper presents a hardware architecture for face detection based system on AdaBoost algorithm using Haar features. We describe the hardware design techniques including image s...
Junguk Cho, Shahnam Mirzaei, Jason Oberg, Ryan Kas...
CODES
1999
IEEE
14 years 1 months ago
A hardware-software cosynthesis technique based on heterogeneous multiprocessor scheduling
In this paper, we propose a fast and simple heuristic for the cosynthesis problem targeting the system-on-chip (SOC) design. The proposed algorithm covers from implementation sele...
Hyunok Oh, Soonhoi Ha
IPPS
2007
IEEE
14 years 3 months ago
Model and Methodology for the Synthesis of Heterogeneous and Partially Reconfigurable Systems
When reconfigurable devices are used in modern embedded systems and their capability to adapt to changing application requirements becomes an issue, comprehensive modeling and de...
Florian Dittmann, Marcelo Götz, Achim Rettber...