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DAC
2005
ACM
14 years 8 months ago
A low latency router supporting adaptivity for on-chip interconnects
The increased deployment of System-on-Chip designs has drawn attention to the limitations of on-chip interconnects. As a potential solution to these limitations, Networks-on -Chip...
Jongman Kim, Dongkook Park, Theo Theocharides, Nar...
INFOCOM
2007
IEEE
14 years 1 months ago
Reduction of Quality (RoQ) Attacks on Dynamic Load Balancers: Vulnerability Assessment and Design Tradeoffs
—One key adaptation mechanism often deployed in networking and computing systems is dynamic load balancing. The goal from employing dynamic load balancers is to ensure that the o...
Mina Guirguis, Azer Bestavros, Ibrahim Matta, Yuti...
GECCO
2007
Springer
181views Optimization» more  GECCO 2007»
14 years 1 months ago
Exploring selection mechanisms for an agent-based distributed evolutionary algorithm
In this paper we propose an agent-based model of evolutionary algorithms (EAs) which extends seamlessly from concurrent single-host to distributed multi-host installations. Since ...
A. E. Eiben, Marc Schoenauer, Juan Luís Jim...
IJCNN
2006
IEEE
14 years 1 months ago
Support Vector Machines to Weight Voters in a Voting System of Entity Extractors
—Support Vector Machines are used to combine the outputs of multiple entity extractors, thus creating a composite entity extraction system. The composite system has a significant...
Deborah Duong, James Venuto, Ben Goertzel, Ryan Ri...
DATE
2010
IEEE
166views Hardware» more  DATE 2010»
14 years 22 days ago
From transistors to MEMS: Throughput-aware power gating in CMOS circuits
—In this paper we study the effectiveness of two power gating methods – transistor switches and MEMS switches – in reducing the power consumption of a design with a certain t...
Michael B. Henry, Leyla Nazhandali