41 search results - page 8 / 9 » Methods for exploiting SAT solvers in unbounded model checki... |
POPL
2008
ACM
14 years 8 months ago
2008
ACM
Relevance heuristics allow us to tailor a program analysis to a particular property to be verified. This in turn makes it possible to improve the precision of the analysis where n...
FMCAD
2007
Springer
14 years 12 days ago
2007
Springer
Parameterized heuristics abound in computer aided design and verification, and manual tuning of the respective parameters is difficult and time-consuming. Very recent results from ...
CAV
2004
Springer
14 years 1 months ago
2004
Springer
SAL 2 augments the specification language and explicit-state model checker of SAL 1 with high-performance symbolic and bounded model checkers, and with novel infinite bounded and...
VLSID
2010
IEEE
13 years 6 months ago
2010
IEEE
Directed test generation is important for the functional verification of complex system-on-chip designs. SAT based bounded model checking is promising for counterexample generatio...
CADE
2009
Springer
14 years 3 months ago
2009
Springer
Abstract. The problem of computing Craig interpolants in SMT has recently received a lot of interest, mainly for its applications in formal verification. Efficient algorithms for ...