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ERSA
2007
177views Hardware» more  ERSA 2007»
13 years 8 months ago
Energy-Aware System Synthesis for Reconfigurable Chip Multiprocessors
- Even though state-of-the-art FPGAs present new opportunities in exploring low-cost high-performance architectures for floating-point scientific applications, they also pose serio...
Xiaofang Wang, Sotirios G. Ziavras, Jie Hu
ESCIENCE
2006
IEEE
14 years 24 days ago
FAME: Adding Multi-Level Authentication to Shibboleth
The paper describes the design of FAME (Flexible Access Middleware Extension) architecture aimed at providing multi-level user authentication service for Shibboleth, which is endo...
Aleksandra Nenadic, Ning Zhang, Jay Chin, Carole A...
ICDCSW
2003
IEEE
14 years 15 hour ago
Privilege Delegation and Agent-Oriented Access Control in Naplet
Access control in existing Java-based mobile agents is mostly based on code source due to limitations of early Java security architecture. That is, authorization is based on where...
Cheng-Zhong Xu, Song Fu
HPCA
2009
IEEE
14 years 7 months ago
Bridging the computation gap between programmable processors and hardwired accelerators
New media and signal processing applications demand ever higher performance while operating within the tight power constraints of mobile devices. A range of hardware implementatio...
Kevin Fan, Manjunath Kudlur, Ganesh S. Dasika, Sco...
CCGRID
2007
IEEE
14 years 1 months ago
Adaptive Performance Modeling on Hierarchical Grid Computing Environments
In the past, efficient parallel algorithms have always been developed specifically for the successive generations of parallel systems (vector machines, shared-memory machines, d...
Wahid Nasri, Luiz Angelo Steffenel, Denis Trystram