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HPCA
2009
IEEE
14 years 10 months ago
Criticality-based optimizations for efficient load processing
Some instructions have more impact on processor performance than others. Identification of these critical instructions can be used to modify and improve instruction processing. Pr...
Samantika Subramaniam, Anne Bracy, Hong Wang 0003,...
IEEEPACT
2000
IEEE
14 years 2 months ago
Global Register Partitioning
Modern computers have taken advantage of the instruction-level parallelism (ILP) available in programs with advances in both architecture and compiler design. Unfortunately, large...
Jason Hiser, Steve Carr, Philip H. Sweany
IPPS
2005
IEEE
14 years 3 months ago
Performance Implications of Periodic Checkpointing on Large-Scale Cluster Systems
Large-scale systems like BlueGene/L are susceptible to a number of software and hardware failures that can affect system performance. Periodic application checkpointing is a commo...
Adam J. Oliner, Ramendra K. Sahoo, José E. ...
IPPS
2003
IEEE
14 years 3 months ago
The CoGenT Project: Co-Generating Compilers and Simulators for Dynamically Compiled Languages
To understand the performance of modern Java systems one must observe execution in the context of specific architectures. It is also important that we make these observations usi...
J. Eliot B. Moss, Charles C. Weems, Timothy Richar...
IPPS
1999
IEEE
14 years 2 months ago
DynBench: A Dynamic Benchmark Suite for Distributed Real-Time Systems
In this paper we present the architecture and framework for a benchmark suite that has been developed as part of the DeSiDeRaTa project. The proposed benchmark suite is representat...
Behrooz Shirazi, Lonnie R. Welch, Binoy Ravindran,...