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DSD
2003
IEEE
138views Hardware» more  DSD 2003»
14 years 1 months ago
A Two-step Genetic Algorithm for Mapping Task Graphs to a Network on Chip Architecture
Network on Chip (NoC) is a new paradigm for designing core based System on Chip which supports high degree of reusability and is scalable. In this paper we describe an efficient t...
Tang Lei, Shashi Kumar
ICIP
2003
IEEE
14 years 1 months ago
Stochastic rate-control of interframe video coders for VBR channels
We propose a new algorithm for the real-time control of an interframe video coder operating with a variable rate channel such as wireless channels or the Internet. Using technique...
Julián Cabrera, José Ignacio Ronda, ...
INFOCOM
2003
IEEE
14 years 1 months ago
Optimal replacement policies for non-uniform cache objects with optional eviction
Abstract— Replacement policies for general caching applications and Web caching in particular have been discussed extensively in the literature. Many ad-hoc policies have been pr...
Omri Bahat, Armand M. Makowski
IPPS
2003
IEEE
14 years 1 months ago
Performance and Overhead in a Hybrid Reconfigurable Computer
In this paper, we overview general hardware architecture and a programming model of SRC-6ETM reconfigurable computers, and compare the performance of the SRC-6E machine vs. IntelÂ...
Osman Devrim Fidanci, Daniel S. Poznanovic, Kris G...
PG
2003
IEEE
14 years 1 months ago
High-Quality Point-Based Rendering on Modern GPUs
In the last years point-based rendering has been shown to offer the potential to outperform traditional triangle based rendering both in speed and visual quality when it comes to ...
Mario Botsch, Leif Kobbelt