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RTAS
2005
IEEE
15 years 10 months ago
Energy-Aware Task Allocation for Rate Monotonic Scheduling
We consider the problem of energy minimization for periodic preemptive hard real-time tasks that are scheduled on an identical multiprocessor platform with dynamic voltage scaling...
Tarek A. AlEnawy, Hakan Aydin
ATVA
2005
Springer
111views Hardware» more  ATVA 2005»
15 years 10 months ago
Model Checking Prioritized Timed Automata
Abstract. Priorities are often used to resolve conflicts in timed systems. However, priorities are not directly supported by state-of-art model checkers. Often, a designer has to ...
Shang-Wei Lin, Pao-Ann Hsiung, Chun-Hsian Huang, Y...
ICS
2005
Tsinghua U.
15 years 10 months ago
A NUCA substrate for flexible CMP cache sharing
We propose an organization for the on-chip memory system of a chip multiprocessor, in which 16 processors share a 16MB pool of 256 L2 cache banks. The L2 cache is organized as a n...
Jaehyuk Huh, Changkyu Kim, Hazim Shafi, Lixin Zhan...
ITC
2000
IEEE
124views Hardware» more  ITC 2000»
15 years 8 months ago
Wrapper design for embedded core test
A wrapper is a thin shell around the core, that provides the switching between functional, and core-internal and core-external test modes. Together with a test access mechanism (T...
Yervant Zorian, Erik Jan Marinissen, Maurice Lousb...
FPL
1999
Springer
147views Hardware» more  FPL 1999»
15 years 8 months ago
Synthia: Synthesis of Interacting Automata Targeting LUT-based FPGAs
This paper details the development, implementation, and results of Synthia, a system for the synthesis of Finite State Machines (FSMs) to field-programmable logic. Our approach us...
George A. Constantinides, Peter Y. K. Cheung, Wayn...